?op view c-mos 64k(8k 8)-bit eeprom ********** UPD28C64AGX-15 ( 1/2 )
il08 a0 - a12
i/o 0 - i/o 7
we
ce
oe ; address inputs
; data inputs/outputs
; write enable input
; chip enable input
; output enable input a2 in
a1 in
a0 in
i/o 0
i/o 1
i/o 2
i/o 3
i/o 4
i/o 5
i/o 6
i/o 7
ce in
a10 in
nc
gnd
nc 32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17 a3 in
a4 in
a5 in
a6 in
a7 in
a12 in
we in
a8 in
a9 in
a11 in
oe in
nc
nc
v dd(+5v)
nc
nc 3
2
1
32
31
30
29
28
20
19
16
18
27 a0
a1
a2
a3
a4
a5
a6
a7
a8
a9
a10
a11
a12 4
5
6
10
11
12
13
14 i/o 0
i/o 1
i/o 2
i/o 3
i/o 4
i/o 5
i/o 6
i/o 7 22 we 15 ce 17 oe 1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
UPD28C64AGX-15 ( 2/2 ) y
selective y
decoder we, oe, ce
logic * above diagram shows conditions before programming. x
decoder address
latch
and
buffer ( 13 ) ( 8 ) i/o 0 - i/o 7 a0 - a12 we
oe
ce 22
15
17 4 - 6, 10 - 14 64k bit
memory
cell
array input/output
buffer
data latch 3 - 1, 32 - 28, 20,
19, 16, 18, 27
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